Home
last modified time | relevance | path

Searched refs:DMAR_IQT_REG (Results 1 – 5 of 5) sorted by relevance

/openbmc/qemu/hw/i386/
H A Dintel_iommu_internal.h62 #define DMAR_IQT_REG 0x88 /* Invalidation queue tail */ macro
H A Dintel_iommu.c2889 uint64_t val = vtd_get_quad_raw(s, DMAR_IQT_REG); in vtd_handle_iqt_write()
3145 case DMAR_IQT_REG: in vtd_mem_write()
4234 vtd_define_quad(s, DMAR_IQT_REG, 0, 0x7fff0ULL, 0); in vtd_init()
/openbmc/linux/drivers/iommu/intel/
H A Ddmar.c1313 tail = readl(iommu->reg + DMAR_IQT_REG); in qi_check_fault()
1421 writel(qi->free_head << shift, iommu->reg + DMAR_IQT_REG); in qi_submit_sync()
1682 while ((readl(iommu->reg + DMAR_IQT_REG) != in dmar_disable_qi()
1719 writel(0, iommu->reg + DMAR_IQT_REG); in __dmar_enable_qi()
H A Ddebugfs.c445 dmar_readq(iommu->reg + DMAR_IQT_REG) >> shift); in invalidation_queue_show()
H A Diommu.h81 #define DMAR_IQT_REG 0x88 /* Invalidation queue tail register */ macro