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Searched refs:DEBUGCTLMSR_LBR (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/arch/x86/kvm/vmx/
H A Dpmu_intel.c639 data &= ~DEBUGCTLMSR_LBR; in intel_pmu_legacy_freezing_lbrs_on_pmi()
710 if (vmcs_read64(GUEST_IA32_DEBUGCTL) & DEBUGCTLMSR_LBR) in vmx_passthrough_lbr_msrs()
732 if (!(vmcs_read64(GUEST_IA32_DEBUGCTL) & DEBUGCTLMSR_LBR)) in intel_pmu_cleanup()
H A Dvmx.c2163 debugctl |= DEBUGCTLMSR_LBR | DEBUGCTLMSR_FREEZE_LBRS_ON_PMI; in vmx_get_supported_debugctl()
2240 if (invalid & (DEBUGCTLMSR_BTF|DEBUGCTLMSR_LBR)) { in vmx_set_msr()
2242 data &= ~(DEBUGCTLMSR_BTF|DEBUGCTLMSR_LBR); in vmx_set_msr()
2243 invalid &= ~(DEBUGCTLMSR_BTF|DEBUGCTLMSR_LBR); in vmx_set_msr()
2255 (data & DEBUGCTLMSR_LBR)) in vmx_set_msr()
/openbmc/u-boot/arch/x86/include/asm/
H A Dmsr-index.h132 #define DEBUGCTLMSR_LBR (1UL << 0) /* last branch recording */ macro
/openbmc/linux/tools/arch/x86/include/asm/
H A Dmsr-index.h345 #define DEBUGCTLMSR_LBR (1UL << 0) /* last branch recording */ macro
/openbmc/linux/arch/x86/include/asm/
H A Dmsr-index.h362 #define DEBUGCTLMSR_LBR (1UL << DEBUGCTLMSR_LBR_BIT) macro
/openbmc/linux/arch/x86/events/
H A Dperf_event.h1456 debugctl &= ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_FREEZE_LBRS_ON_PMI); in __intel_pmu_lbr_disable()
/openbmc/linux/arch/x86/events/intel/
H A Dlbr.c145 debugctl |= DEBUGCTLMSR_LBR; in __intel_pmu_lbr_enable()
H A Dcore.c2913 ~(DEBUGCTLMSR_FREEZE_LBRS_ON_PMI|DEBUGCTLMSR_LBR)); in intel_pmu_reset()
/openbmc/linux/arch/x86/kvm/svm/
H A Dsvm.c1065 bool enable_lbrv = (svm_get_lbr_vmcb(svm)->save.dbgctl & DEBUGCTLMSR_LBR) || in svm_update_lbrv()