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Searched refs:DDR_CTL_SRAM_GE0_SYNC (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/arch/mips/mach-ath79/qca953x/
H A Dddr.c97 #define DDR_CTL_SRAM_GE0_SYNC BIT(20) macro
107 DDR_CTL_SRAM_GE0_SYNC | \