Searched refs:DDRPHY_SHU1_PLL4 (Results 1 – 1 of 1) sorted by relevance
96 #define DDRPHY_SHU1_PLL4 0x0d90 macro351 writel(0xe57800fe, priv->ddrphy + DDRPHY_SHU1_PLL4); in mtk_ddr3_init()