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Searched refs:DDRPHY_SHU1_B0_DQ6 (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/drivers/ram/mediatek/
H A Dddr3-mt7629.c83 #define DDRPHY_SHU1_B0_DQ6 0x0c18 macro
332 writel(0x0, priv->ddrphy + DDRPHY_SHU1_B0_DQ6); in mtk_ddr3_init()
384 writel(0x32cd0000, priv->ddrphy + DDRPHY_SHU1_B0_DQ6); in mtk_ddr3_init()
399 writel(0x3acd0000, priv->ddrphy + DDRPHY_SHU1_B0_DQ6); in mtk_ddr3_init()