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Searched refs:DCSR_RUN (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/dma/
H A Dsa11x0-dma.c37 #define DCSR_RUN (1 << 0) macro
205 dcsr = DCSR_STRTA | DCSR_IE | DCSR_RUN; in sa11x0_dma_start_sg()
209 dcsr = DCSR_STRTB | DCSR_IE | DCSR_RUN; in sa11x0_dma_start_sg()
316 writel_relaxed(DCSR_RUN | DCSR_STRTA | DCSR_STRTB, in sa11x0_dma_start_txd()
714 writel(DCSR_RUN | DCSR_IE, p->base + DMA_DCSR_C); in sa11x0_dma_device_pause()
740 writel(DCSR_RUN | DCSR_IE, p->base + DMA_DCSR_S); in sa11x0_dma_device_resume()
769 writel(DCSR_RUN | DCSR_IE | in sa11x0_dma_device_terminate_all()
939 writel_relaxed(DCSR_RUN | DCSR_IE | DCSR_ERROR | in sa11x0_dma_probe()
1014 if (dcsr & DCSR_RUN) { in sa11x0_dma_suspend()
1015 writel(DCSR_RUN | DCSR_IE, p->base + DMA_DCSR_C); in sa11x0_dma_suspend()
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H A Dmmp_pdma.c32 #define DCSR_RUN BIT(31) /* Run Bit (read / write) */ macro
169 writel(readl(phy->base + reg) | DCSR_RUN, phy->base + reg); in enable_chan()
180 writel(readl(phy->base + reg) & ~DCSR_RUN, phy->base + reg); in disable_chan()
/openbmc/u-boot/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h133 #define DCSR_RUN (1 << 31) /* Run Bit (read / write) */ macro
/openbmc/u-boot/include/
H A DSA-1100.h2541 #define DCSR_RUN 0x00000001 /* DMA RUNing */ macro