Home
last modified time | relevance | path

Searched refs:DCCG_SRII (Results 1 – 21 of 21) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn31/
H A Ddcn31_dccg.h33 DCCG_SRII(DTO_PARAM, DPPCLK, 0),\
34 DCCG_SRII(DTO_PARAM, DPPCLK, 1),\
35 DCCG_SRII(DTO_PARAM, DPPCLK, 2),\
36 DCCG_SRII(DTO_PARAM, DPPCLK, 3),\
45 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 0),\
46 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 1),\
47 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 2),\
48 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 3),\
49 DCCG_SRII(MODULO, DTBCLK_DTO, 0),\
50 DCCG_SRII(MODULO, DTBCLK_DTO, 1),\
[all …]
H A Ddcn31_resource.c158 #define DCCG_SRII(reg_name, block, id)\ macro
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn314/
H A Ddcn314_dccg.h38 DCCG_SRII(DTO_PARAM, DPPCLK, 0),\
39 DCCG_SRII(DTO_PARAM, DPPCLK, 1),\
40 DCCG_SRII(DTO_PARAM, DPPCLK, 2),\
41 DCCG_SRII(DTO_PARAM, DPPCLK, 3),\
42 DCCG_SRII(CLOCK_CNTL, HDMICHARCLK, 0),\
52 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 0),\
53 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 1),\
54 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 2),\
55 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 3),\
56 DCCG_SRII(MODULO, DTBCLK_DTO, 0),\
[all …]
H A Ddcn314_resource.c174 #define DCCG_SRII(reg_name, block, id)\ macro
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_dccg.h33 DCCG_SRII(DTO_PARAM, DPPCLK, 0),\
34 DCCG_SRII(DTO_PARAM, DPPCLK, 1),\
35 DCCG_SRII(DTO_PARAM, DPPCLK, 2),\
36 DCCG_SRII(DTO_PARAM, DPPCLK, 3),\
38 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 0),\
39 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 1),\
44 DCCG_SRII(DTO_PARAM, DPPCLK, 4),\
45 DCCG_SRII(DTO_PARAM, DPPCLK, 5),\
46 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 2),\
47 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 3),\
[all …]
H A Ddcn20_resource.c156 #define DCCG_SRII(reg_name, block, id)\ macro
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn301/
H A Ddcn301_dccg.h33 DCCG_SRII(DTO_PARAM, DPPCLK, 0),\
34 DCCG_SRII(DTO_PARAM, DPPCLK, 1),\
35 DCCG_SRII(DTO_PARAM, DPPCLK, 2),\
36 DCCG_SRII(DTO_PARAM, DPPCLK, 3),\
H A Ddcn301_resource.c150 #define DCCG_SRII(reg_name, block, id)\ macro
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_dccg.h41 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 2),\
42 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 3),\
43 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 4),\
44 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 5),\
H A Ddcn30_resource.c146 #define DCCG_SRII(reg_name, block, id)\ macro
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn303/
H A Ddcn303_dccg.h16 DCCG_SRII(DTO_PARAM, DPPCLK, 0),\
17 DCCG_SRII(DTO_PARAM, DPPCLK, 1),\
20 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 0),\
21 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 1)
H A Ddcn303_resource.c167 #define DCCG_SRII(reg_name, block, id)\ macro
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/
H A Ddcn32_resource.h1287 SR(DPPCLK_DTO_CTRL), DCCG_SRII(DTO_PARAM, DPPCLK, 0), \
1288 DCCG_SRII(DTO_PARAM, DPPCLK, 1), DCCG_SRII(DTO_PARAM, DPPCLK, 2), \
1289 DCCG_SRII(DTO_PARAM, DPPCLK, 3), DCCG_SRII(CLOCK_CNTL, HDMICHARCLK, 0), \
1294 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 0), DCCG_SRII(PIXEL_RATE_CNTL, OTG, 1), \
1295 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 2), DCCG_SRII(PIXEL_RATE_CNTL, OTG, 3), \
1296 DCCG_SRII(MODULO, DTBCLK_DTO, 0), DCCG_SRII(MODULO, DTBCLK_DTO, 1), \
1297 DCCG_SRII(MODULO, DTBCLK_DTO, 2), DCCG_SRII(MODULO, DTBCLK_DTO, 3), \
1298 DCCG_SRII(PHASE, DTBCLK_DTO, 0), DCCG_SRII(PHASE, DTBCLK_DTO, 1), \
1299 DCCG_SRII(PHASE, DTBCLK_DTO, 2), DCCG_SRII(PHASE, DTBCLK_DTO, 3), \
H A Ddcn32_resource.c170 #define DCCG_SRII(reg_name, block, id)\ macro
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn302/
H A Ddcn302_dccg.h34 DCCG_SRII(DTO_PARAM, DPPCLK, 4)
H A Ddcn302_resource.c189 #define DCCG_SRII(reg_name, block, id)\ macro
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn201/
H A Ddcn201_resource.c270 #define DCCG_SRII(reg_name, block, id)\ macro
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn21/
H A Ddcn21_resource.c117 #define DCCG_SRII(reg_name, block, id)\ macro
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn316/
H A Ddcn316_resource.c180 #define DCCG_SRII(reg_name, block, id)\ macro
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn315/
H A Ddcn315_resource.c192 #define DCCG_SRII(reg_name, block, id)\ macro
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn321/
H A Ddcn321_resource.c170 #define DCCG_SRII(reg_name, block, id)\ macro