Searched refs:D3VGA_CONTROL (Results 1 – 9 of 9) sorted by relevance
| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dce/ |
| H A D | dce_hwseq.h | 251 SR(D3VGA_CONTROL), \
315 SR(D3VGA_CONTROL), \
365 SR(D3VGA_CONTROL), \
473 SR(D3VGA_CONTROL), \
533 SR(D3VGA_CONTROL), \
563 SR(D3VGA_CONTROL), \
653 uint32_t D3VGA_CONTROL; member
815 HWS_SF(, D3VGA_CONTROL, D3VGA_MODE_ENABLE, mask_sh),\
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn316/ |
| H A D | dcn316_resource.c | 721 SR(D3VGA_CONTROL), \
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn315/ |
| H A D | dcn315_resource.c | 724 SR(D3VGA_CONTROL), \
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn321/ |
| H A D | dcn321_resource.c | 573 SR(D3VGA_CONTROL), \
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn314/ |
| H A D | dcn314_resource.c | 733 SR(D3VGA_CONTROL), \
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_hw_sequencer.c | 585 REG_GET(D3VGA_CONTROL, D3VGA_MODE_ENABLE, &in_vga3_mode); in dcn10_disable_vga()
594 REG_WRITE(D3VGA_CONTROL, 0); in dcn10_disable_vga()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn31/ |
| H A D | dcn31_resource.c | 725 SR(D3VGA_CONTROL), \
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/ |
| H A D | dcn32_resource.c | 574 SR(D3VGA_CONTROL), \
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
| H A D | dcn20_hwseq.c | 267 REG_WRITE(D3VGA_CONTROL, 0); in dcn20_disable_vga()
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