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Searched refs:CSR_TVAL (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/arch/riscv/kernel/
H A Dentry.S63 csrr s3, CSR_TVAL
199 csrr s3, CSR_TVAL
H A Dcrash_save_regs.S48 csrr t3, CSR_TVAL
H A Dsuspend_entry.S50 csrr t0, CSR_TVAL
/openbmc/linux/arch/riscv/include/asm/
H A Dcsr.h403 # define CSR_TVAL CSR_MTVAL macro
427 # define CSR_TVAL CSR_STVAL macro
H A Dassembler.h28 csrw CSR_TVAL, t0
/openbmc/qemu/target/loongarch/
H A Dmachine.c206 VMSTATE_UINT64(env.CSR_TVAL, LoongArchCPU),
H A Dcpu.h342 uint64_t CSR_TVAL; member
H A Dcpu.c779 qemu_fprintf(f, "TVAL=%016" PRIx64 "\n", env->CSR_TVAL); in loongarch_cpu_dump_state()
/openbmc/qemu/target/loongarch/kvm/
H A Dkvm.c292 &env->CSR_TVAL); in kvm_loongarch_get_csr()
468 &env->CSR_TVAL); in kvm_loongarch_put_csr()