Searched refs:CRTC2_DISPLAY_BASE_ADDR (Results 1 – 5 of 5) sorted by relevance
597 rinfo->save_regs[33] = INREG(CRTC2_DISPLAY_BASE_ADDR); in radeon_pm_save_regs()706 OUTREG(CRTC2_DISPLAY_BASE_ADDR, rinfo->save_regs[33]); in radeon_pm_restore_regs()1729 OUTREG(CRTC2_DISPLAY_BASE_ADDR, rinfo->save_regs[33]); in radeon_reinitialize_M10()1984 OUTREG(CRTC2_DISPLAY_BASE_ADDR, rinfo->save_regs[33]); in radeon_reinitialize_M9P()2222 OUTREG(CRTC2_DISPLAY_BASE_ADDR, rinfo->save_regs[33]);
2068 OUTREG(CRTC2_DISPLAY_BASE_ADDR, aper_base); in fixup_memory_mappings()2073 OUTREG(CRTC2_DISPLAY_BASE_ADDR, 0); in fixup_memory_mappings()2109 OUTREG(CRTC2_DISPLAY_BASE_ADDR, (tom & 0xffff) << 16); in radeon_identify_vram()
119 OUTREG(CRTC2_DISPLAY_BASE_ADDR, (tom & 0xffff) << 16); in radeon_identify_vram()
100 #define CRTC2_DISPLAY_BASE_ADDR 0x033c macro