Searched refs:CR0_PG_MASK (Results 1 – 14 of 14) sorted by relevance
126 uint64_t mask = CR0_PG_MASK | CR0_CD_MASK | CR0_NW_MASK | in macvm_set_cr0()130 if ((cr0 & CR0_PG_MASK) && (rvmcs(vcpu, VMCS_GUEST_CR4) & CR4_PAE_MASK) && in macvm_set_cr0()145 if (changed_cr0 & CR0_PG_MASK) { in macvm_set_cr0()146 if (cr0 & CR0_PG_MASK) { in macvm_set_cr0()158 cr0 = (cr0 & ~(mask & ~CR0_PG_MASK)); in macvm_set_cr0()
152 return cr0 & CR0_PG_MASK; in x86_is_paging_mode()
136 if ((new_cr0 & (CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK)) != in cpu_x86_update_cr0()137 (env->cr[0] & (CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK))) { in cpu_x86_update_cr0()142 if (!(env->cr[0] & CR0_PG_MASK) && (new_cr0 & CR0_PG_MASK) && in cpu_x86_update_cr0()150 } else if ((env->cr[0] & CR0_PG_MASK) && !(new_cr0 & CR0_PG_MASK) && in cpu_x86_update_cr0()175 if (env->cr[0] & CR0_PG_MASK) { in cpu_x86_update_cr3()252 if (!(env->cr[0] & CR0_PG_MASK)) { in x86_cpu_get_phys_page_attrs_debug()
228 if (!(env->cr[0] & CR0_PG_MASK)) { in hmp_info_tlb()556 if (!(env->cr[0] & CR0_PG_MASK)) { in hmp_info_mem()
238 #define CR0_PG_MASK (1U << 31) macro
8253 return cpu->env.cr[0] & CR0_PG_MASK; in x86_cpu_get_paging_enabled()
32 env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK; in target_cpu_init()
102 if ((env->efer & MSR_EFER_LME) && (env->cr[0] & CR0_PG_MASK) in is_efer_invalid_state()107 if ((env->efer & MSR_EFER_LME) && (env->cr[0] & CR0_PG_MASK) in is_efer_invalid_state()112 if ((env->efer & MSR_EFER_LME) && (env->cr[0] & CR0_PG_MASK) in is_efer_invalid_state()
579 if (likely(env->cr[0] & CR0_PG_MASK || use_stage2)) { in get_physical_address()
169 CR0_PG_MASK)); in do_smm_enter()
341 env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK; in target_cpu_copy_regs()
98 if (!(env->cr[0] & CR0_PG_MASK)) { in get_pg_mode()503 if ((type & 8) && (env->cr[0] & CR0_PG_MASK)) { in switch_tss_ra()
3808 CR0_PE_MASK | CR0_PG_MASK | CR0_NE_MASK); in kvm_msr_entry_add_vmx()4304 env->cr[0] & CR0_PG_MASK) { in kvm_get_sregs()4347 env->cr[0] & CR0_PG_MASK) { in kvm_get_sregs2()