Home
last modified time | relevance | path

Searched refs:CQSPI_REG_SDRAMLEVEL (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/drivers/spi/
H A Dcadence_qspi_apb.c110 #define CQSPI_REG_SDRAMLEVEL 0x2C macro
167 (((readl(reg_base + CQSPI_REG_SDRAMLEVEL)) >> \
171 (((readl(reg_base + CQSPI_REG_SDRAMLEVEL)) >> \
605 u32 reg = readl(plat->regbase + CQSPI_REG_SDRAMLEVEL); in cadence_qspi_get_rd_sram_level()
755 ret = wait_for_bit_le32(plat->regbase + CQSPI_REG_SDRAMLEVEL, in cadence_qspi_apb_indirect_write_execute()
/openbmc/linux/drivers/spi/
H A Dspi-cadence-quadspi.c191 #define CQSPI_REG_SDRAMLEVEL 0x2C macro
311 u32 reg = readl(cqspi->iobase + CQSPI_REG_SDRAMLEVEL); in cqspi_get_rd_sram_level()