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Searched refs:CQSPI_REG_MODE_BIT (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/drivers/spi/
H A Dcadence_qspi_apb.c108 #define CQSPI_REG_MODE_BIT 0x28 macro
578 writel(0x0, plat->regbase + CQSPI_REG_MODE_BIT); in cadence_qspi_apb_indirect_read_setup()
580 writel(0xFF, plat->regbase + CQSPI_REG_MODE_BIT); in cadence_qspi_apb_indirect_read_setup()
803 writel(xip_dummy, reg_base + CQSPI_REG_MODE_BIT); in cadence_qspi_apb_enter_xip()
/openbmc/linux/drivers/spi/
H A Dspi-cadence-quadspi.c189 #define CQSPI_REG_MODE_BIT 0x28 macro