Searched refs:CQSPI_REG_CMDCTRL (Results 1 – 2 of 2) sorted by relevance
129 #define CQSPI_REG_CMDCTRL 0x90 macro410 writel(reg, reg_base + CQSPI_REG_CMDCTRL); in cadence_qspi_apb_exec_flash_cmd()413 writel(reg, reg_base + CQSPI_REG_CMDCTRL); in cadence_qspi_apb_exec_flash_cmd()416 reg = readl(reg_base + CQSPI_REG_CMDCTRL); in cadence_qspi_apb_exec_flash_cmd()
212 #define CQSPI_REG_CMDCTRL 0x90 macro426 writel(reg, reg_base + CQSPI_REG_CMDCTRL); in cqspi_exec_flash_cmd()429 writel(reg, reg_base + CQSPI_REG_CMDCTRL); in cqspi_exec_flash_cmd()432 ret = cqspi_wait_for_bit(reg_base + CQSPI_REG_CMDCTRL, in cqspi_exec_flash_cmd()577 writel(0, reg_base + CQSPI_REG_CMDCTRL); in cqspi_command_read()646 writel(0, reg_base + CQSPI_REG_CMDCTRL); in cqspi_command_write()