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Searched refs:CP_WAIT_SEM_ADDR_LO__SEM_ADDR_SWAP_MASK (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h3186 #define CP_WAIT_SEM_ADDR_LO__SEM_ADDR_SWAP_MASK 0x00000003L macro
H A Dgfx_7_2_sh_mask.h2575 #define CP_WAIT_SEM_ADDR_LO__SEM_ADDR_SWAP_MASK 0x3 macro
H A Dgfx_8_1_sh_mask.h3661 #define CP_WAIT_SEM_ADDR_LO__SEM_ADDR_SWAP_MASK 0x3 macro
H A Dgfx_8_0_sh_mask.h3139 #define CP_WAIT_SEM_ADDR_LO__SEM_ADDR_SWAP_MASK 0x3 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h19398 #define CP_WAIT_SEM_ADDR_LO__SEM_ADDR_SWAP_MASK … macro
H A Dgc_9_1_sh_mask.h20709 #define CP_WAIT_SEM_ADDR_LO__SEM_ADDR_SWAP_MASK … macro
H A Dgc_9_2_1_sh_mask.h20636 #define CP_WAIT_SEM_ADDR_LO__SEM_ADDR_SWAP_MASK … macro
H A Dgc_9_4_3_sh_mask.h22764 #define CP_WAIT_SEM_ADDR_LO__SEM_ADDR_SWAP_MASK … macro
H A Dgc_9_4_2_sh_mask.h12863 #define CP_WAIT_SEM_ADDR_LO__SEM_ADDR_SWAP_MASK … macro
H A Dgc_10_1_0_sh_mask.h27311 #define CP_WAIT_SEM_ADDR_LO__SEM_ADDR_SWAP_MASK … macro