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Searched refs:CP_SIG_SEM_ADDR_HI__SEM_ADDR_HI_MASK (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2916 #define CP_SIG_SEM_ADDR_HI__SEM_ADDR_HI_MASK 0x000000ffL macro
H A Dgfx_7_2_sh_mask.h2565 #define CP_SIG_SEM_ADDR_HI__SEM_ADDR_HI_MASK 0xffff macro
H A Dgfx_8_1_sh_mask.h3651 #define CP_SIG_SEM_ADDR_HI__SEM_ADDR_HI_MASK 0xffff macro
H A Dgfx_8_0_sh_mask.h3129 #define CP_SIG_SEM_ADDR_HI__SEM_ADDR_HI_MASK 0xffff macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h19387 #define CP_SIG_SEM_ADDR_HI__SEM_ADDR_HI_MASK … macro
H A Dgc_9_1_sh_mask.h20698 #define CP_SIG_SEM_ADDR_HI__SEM_ADDR_HI_MASK … macro
H A Dgc_9_2_1_sh_mask.h20625 #define CP_SIG_SEM_ADDR_HI__SEM_ADDR_HI_MASK … macro
H A Dgc_9_4_3_sh_mask.h22753 #define CP_SIG_SEM_ADDR_HI__SEM_ADDR_HI_MASK … macro
H A Dgc_9_4_2_sh_mask.h12852 #define CP_SIG_SEM_ADDR_HI__SEM_ADDR_HI_MASK … macro
H A Dgc_11_0_0_sh_mask.h26775 #define CP_SIG_SEM_ADDR_HI__SEM_ADDR_HI_MASK … macro
H A Dgc_10_1_0_sh_mask.h27300 #define CP_SIG_SEM_ADDR_HI__SEM_ADDR_HI_MASK … macro
H A Dgc_11_0_3_sh_mask.h29275 #define CP_SIG_SEM_ADDR_HI__SEM_ADDR_HI_MASK … macro
H A Dgc_10_3_0_sh_mask.h25561 #define CP_SIG_SEM_ADDR_HI__SEM_ADDR_HI_MASK … macro