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Searched refs:CP_INT_STATUS_RING0__GFX_IDLE_INT_STAT_MASK (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_1_sh_mask.h2149 #define CP_INT_STATUS_RING0__GFX_IDLE_INT_STAT_MASK 0x200000 macro
H A Dgfx_8_0_sh_mask.h1625 #define CP_INT_STATUS_RING0__GFX_IDLE_INT_STAT_MASK 0x200000 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h11103 #define CP_INT_STATUS_RING0__GFX_IDLE_INT_STAT_MASK … macro
H A Dgc_9_1_sh_mask.h12584 #define CP_INT_STATUS_RING0__GFX_IDLE_INT_STAT_MASK … macro
H A Dgc_9_2_1_sh_mask.h12388 #define CP_INT_STATUS_RING0__GFX_IDLE_INT_STAT_MASK … macro
H A Dgc_9_4_3_sh_mask.h14113 #define CP_INT_STATUS_RING0__GFX_IDLE_INT_STAT_MASK … macro
H A Dgc_9_4_2_sh_mask.h2404 #define CP_INT_STATUS_RING0__GFX_IDLE_INT_STAT_MASK … macro
H A Dgc_11_0_0_sh_mask.h15480 #define CP_INT_STATUS_RING0__GFX_IDLE_INT_STAT_MASK … macro
H A Dgc_10_1_0_sh_mask.h18058 #define CP_INT_STATUS_RING0__GFX_IDLE_INT_STAT_MASK … macro
H A Dgc_11_0_3_sh_mask.h17635 #define CP_INT_STATUS_RING0__GFX_IDLE_INT_STAT_MASK … macro
H A Dgc_10_3_0_sh_mask.h16322 #define CP_INT_STATUS_RING0__GFX_IDLE_INT_STAT_MASK … macro