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Searched refs:CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE_MASK (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v6_0.c3229 cp_int_cntl &= ~CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE_MASK; in gfx_v6_0_set_compute_eop_interrupt_state()
3242 cp_int_cntl |= CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE_MASK; in gfx_v6_0_set_compute_eop_interrupt_state()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2406 #define CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE_MASK 0x04000000L macro
H A Dgfx_7_2_sh_mask.h1209 #define CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE_MASK 0x4000000 macro
H A Dgfx_8_1_sh_mask.h2067 #define CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE_MASK 0x4000000 macro
H A Dgfx_8_0_sh_mask.h1543 #define CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE_MASK 0x4000000 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h11041 #define CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE_MASK … macro
H A Dgc_9_1_sh_mask.h12522 #define CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE_MASK … macro
H A Dgc_9_2_1_sh_mask.h12326 #define CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE_MASK … macro
H A Dgc_9_4_3_sh_mask.h14051 #define CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE_MASK … macro
H A Dgc_9_4_2_sh_mask.h2342 #define CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE_MASK … macro
H A Dgc_11_0_0_sh_mask.h15445 #define CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE_MASK … macro
H A Dgc_10_1_0_sh_mask.h17988 #define CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE_MASK … macro
H A Dgc_11_0_3_sh_mask.h17600 #define CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE_MASK … macro
H A Dgc_10_3_0_sh_mask.h16252 #define CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE_MASK … macro