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Searched refs:CP_INT_CNTL_RING0__CMP_BUSY_INT_ENABLE_MASK (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_1_sh_mask.h2023 #define CP_INT_CNTL_RING0__CMP_BUSY_INT_ENABLE_MASK 0x40000 macro
H A Dgfx_8_0_sh_mask.h1499 #define CP_INT_CNTL_RING0__CMP_BUSY_INT_ENABLE_MASK 0x40000 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h11001 #define CP_INT_CNTL_RING0__CMP_BUSY_INT_ENABLE_MASK … macro
H A Dgc_9_1_sh_mask.h12482 #define CP_INT_CNTL_RING0__CMP_BUSY_INT_ENABLE_MASK … macro
H A Dgc_9_2_1_sh_mask.h12286 #define CP_INT_CNTL_RING0__CMP_BUSY_INT_ENABLE_MASK … macro
H A Dgc_9_4_3_sh_mask.h14011 #define CP_INT_CNTL_RING0__CMP_BUSY_INT_ENABLE_MASK … macro
H A Dgc_9_4_2_sh_mask.h2302 #define CP_INT_CNTL_RING0__CMP_BUSY_INT_ENABLE_MASK … macro
H A Dgc_11_0_0_sh_mask.h15415 #define CP_INT_CNTL_RING0__CMP_BUSY_INT_ENABLE_MASK … macro
H A Dgc_10_1_0_sh_mask.h17946 #define CP_INT_CNTL_RING0__CMP_BUSY_INT_ENABLE_MASK … macro
H A Dgc_11_0_3_sh_mask.h17570 #define CP_INT_CNTL_RING0__CMP_BUSY_INT_ENABLE_MASK … macro
H A Dgc_10_3_0_sh_mask.h16210 #define CP_INT_CNTL_RING0__CMP_BUSY_INT_ENABLE_MASK … macro