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Searched refs:CP_HQD_HQ_SCHEDULER1__SCHEDULER__SHIFT (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h3444 #define CP_HQD_HQ_SCHEDULER1__SCHEDULER__SHIFT 0x0 macro
H A Dgfx_8_1_sh_mask.h4600 #define CP_HQD_HQ_SCHEDULER1__SCHEDULER__SHIFT 0x0 macro
H A Dgfx_8_0_sh_mask.h4078 #define CP_HQD_HQ_SCHEDULER1__SCHEDULER__SHIFT 0x0 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h13047 #define CP_HQD_HQ_SCHEDULER1__SCHEDULER__SHIFT … macro
H A Dgc_9_1_sh_mask.h14351 #define CP_HQD_HQ_SCHEDULER1__SCHEDULER__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h14216 #define CP_HQD_HQ_SCHEDULER1__SCHEDULER__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h16583 #define CP_HQD_HQ_SCHEDULER1__SCHEDULER__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h4149 #define CP_HQD_HQ_SCHEDULER1__SCHEDULER__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h17590 #define CP_HQD_HQ_SCHEDULER1__SCHEDULER__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h20470 #define CP_HQD_HQ_SCHEDULER1__SCHEDULER__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h19835 #define CP_HQD_HQ_SCHEDULER1__SCHEDULER__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h18623 #define CP_HQD_HQ_SCHEDULER1__SCHEDULER__SHIFT … macro