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Searched refs:CP_HQD_EOP_WPTR__EOP_AVAIL__SHIFT (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_1_sh_mask.h4652 #define CP_HQD_EOP_WPTR__EOP_AVAIL__SHIFT 0x10 macro
H A Dgfx_8_0_sh_mask.h4130 #define CP_HQD_EOP_WPTR__EOP_AVAIL__SHIFT 0x10 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h13111 #define CP_HQD_EOP_WPTR__EOP_AVAIL__SHIFT … macro
H A Dgc_9_1_sh_mask.h14415 #define CP_HQD_EOP_WPTR__EOP_AVAIL__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h14280 #define CP_HQD_EOP_WPTR__EOP_AVAIL__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h16647 #define CP_HQD_EOP_WPTR__EOP_AVAIL__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h4213 #define CP_HQD_EOP_WPTR__EOP_AVAIL__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h17658 #define CP_HQD_EOP_WPTR__EOP_AVAIL__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h20538 #define CP_HQD_EOP_WPTR__EOP_AVAIL__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h19903 #define CP_HQD_EOP_WPTR__EOP_AVAIL__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h18691 #define CP_HQD_EOP_WPTR__EOP_AVAIL__SHIFT … macro