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Searched refs:CP_DMA_PFP_CONTROL__DST_CACHE_POLICY__SHIFT (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h2732 #define CP_DMA_PFP_CONTROL__DST_CACHE_POLICY__SHIFT 0x19 macro
H A Dgfx_8_1_sh_mask.h3826 #define CP_DMA_PFP_CONTROL__DST_CACHE_POLICY__SHIFT 0x19 macro
H A Dgfx_8_0_sh_mask.h3304 #define CP_DMA_PFP_CONTROL__DST_CACHE_POLICY__SHIFT 0x19 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h19415 #define CP_DMA_PFP_CONTROL__DST_CACHE_POLICY__SHIFT … macro
H A Dgc_9_1_sh_mask.h20726 #define CP_DMA_PFP_CONTROL__DST_CACHE_POLICY__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h20653 #define CP_DMA_PFP_CONTROL__DST_CACHE_POLICY__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h22781 #define CP_DMA_PFP_CONTROL__DST_CACHE_POLICY__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h12880 #define CP_DMA_PFP_CONTROL__DST_CACHE_POLICY__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h26806 #define CP_DMA_PFP_CONTROL__DST_CACHE_POLICY__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h27329 #define CP_DMA_PFP_CONTROL__DST_CACHE_POLICY__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h29306 #define CP_DMA_PFP_CONTROL__DST_CACHE_POLICY__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h25590 #define CP_DMA_PFP_CONTROL__DST_CACHE_POLICY__SHIFT … macro