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Searched refs:CP_CPF_STATUS__ROQ_CE_INDIRECT1_BUSY__SHIFT (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h2124 #define CP_CPF_STATUS__ROQ_CE_INDIRECT1_BUSY__SHIFT 0xa macro
H A Dgfx_8_1_sh_mask.h3168 #define CP_CPF_STATUS__ROQ_CE_INDIRECT1_BUSY__SHIFT 0xa macro
H A Dgfx_8_0_sh_mask.h2646 #define CP_CPF_STATUS__ROQ_CE_INDIRECT1_BUSY__SHIFT 0xa macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h704 #define CP_CPF_STATUS__ROQ_CE_INDIRECT1_BUSY__SHIFT … macro
H A Dgc_9_1_sh_mask.h603 #define CP_CPF_STATUS__ROQ_CE_INDIRECT1_BUSY__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h592 #define CP_CPF_STATUS__ROQ_CE_INDIRECT1_BUSY__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h633 #define CP_CPF_STATUS__ROQ_CE_INDIRECT1_BUSY__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h1222 #define CP_CPF_STATUS__ROQ_CE_INDIRECT1_BUSY__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h6083 #define CP_CPF_STATUS__ROQ_CE_INDIRECT1_BUSY__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h6140 #define CP_CPF_STATUS__ROQ_CE_INDIRECT1_BUSY__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h6858 #define CP_CPF_STATUS__ROQ_CE_INDIRECT1_BUSY__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h6393 #define CP_CPF_STATUS__ROQ_CE_INDIRECT1_BUSY__SHIFT … macro