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Searched refs:CP_CPC_BUSY_STAT__MEC1_PIPE1_BUSY__SHIFT (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h2036 #define CP_CPC_BUSY_STAT__MEC1_PIPE1_BUSY__SHIFT 0xb macro
H A Dgfx_8_1_sh_mask.h3090 #define CP_CPC_BUSY_STAT__MEC1_PIPE1_BUSY__SHIFT 0xb macro
H A Dgfx_8_0_sh_mask.h2568 #define CP_CPC_BUSY_STAT__MEC1_PIPE1_BUSY__SHIFT 0xb macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h621 #define CP_CPC_BUSY_STAT__MEC1_PIPE1_BUSY__SHIFT … macro
H A Dgc_9_1_sh_mask.h520 #define CP_CPC_BUSY_STAT__MEC1_PIPE1_BUSY__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h509 #define CP_CPC_BUSY_STAT__MEC1_PIPE1_BUSY__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h550 #define CP_CPC_BUSY_STAT__MEC1_PIPE1_BUSY__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h1139 #define CP_CPC_BUSY_STAT__MEC1_PIPE1_BUSY__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h5996 #define CP_CPC_BUSY_STAT__MEC1_PIPE1_BUSY__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h6055 #define CP_CPC_BUSY_STAT__MEC1_PIPE1_BUSY__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h6771 #define CP_CPC_BUSY_STAT__MEC1_PIPE1_BUSY__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h6308 #define CP_CPC_BUSY_STAT__MEC1_PIPE1_BUSY__SHIFT … macro