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Searched refs:CPT_AF_LFX_CTL2 (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/net/ethernet/marvell/octeontx2/af/
H A Drvu_cpt.c444 val = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf)); in rvu_mbox_handler_cpt_lf_alloc()
448 rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf), val); in rvu_mbox_handler_cpt_lf_alloc()
531 val = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf)); in cpt_inline_ipsec_cfg_inbound()
534 rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf), val); in cpt_inline_ipsec_cfg_inbound()
584 val = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf)); in cpt_inline_ipsec_cfg_outbound()
586 rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf), val); in cpt_inline_ipsec_cfg_outbound()
650 (offset & 0xFF000) == CPT_AF_LFX_CTL2(0)) { in validate_and_update_reg_offset()
905 ctl2 = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf)); in rvu_mbox_handler_cpt_lf_reset()
913 rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf), ctl2); in rvu_mbox_handler_cpt_lf_reset()
H A Drvu_reg.h499 #define CPT_AF_LFX_CTL2(a) (0x29000ull | (u64)(a) << 3) macro
H A Drvu_debugfs.c3288 reg = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL2(lf)); in rvu_dbg_cpt_lfs_info_display()