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Searched refs:CPOL (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/spi/
H A Dspi-atmel.c424 new_polarity = (asd->csr & SPI_BIT(CPOL)) != 0; in cs_activate()
437 u32 cpol = (spi->mode & SPI_CPOL) ? SPI_BIT(CPOL) : 0; in cs_activate()
444 if ((csr ^ cpol) & SPI_BIT(CPOL)) in cs_activate()
446 csr ^ SPI_BIT(CPOL)); in cs_activate()
1298 csr |= SPI_BIT(CPOL); in atmel_spi_setup()
H A Dspi-geni-qcom.c30 #define CPOL BIT(2) macro
410 cpol = CPOL; in setup_fifo_params()
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dqca,qca7000.txt52 spi-cpol; /* SPI mode: CPOL=1 */
/openbmc/linux/Documentation/spi/
H A Dspi-summary.rst100 - CPOL indicates the initial clock polarity. CPOL=0 means the
102 the second (trailing) edge is falling. CPOL=1 means the clock
113 but their timing diagrams will make the CPOL and CPHA modes clear.
115 In the SPI mode number, CPOL is the high order bit and CPHA is the
117 starting low (CPOL=0) and data stabilized for sampling during the
/openbmc/u-boot/doc/device-tree-bindings/spi/
H A Dspi-bus.txt51 inverse clock polarity (CPOL) mode
/openbmc/qemu/hw/char/
H A Dstm32l4x5_usart.c71 FIELD(CR2, CPOL, 10, 1) /* Clock polarity */
/openbmc/openbmc/poky/meta/files/common-licenses/
H A DCPOL-1.021 The Code Project Open License (CPOL) 1.02