CPLD_LANE_G_SEL (reference) in projects: openbmc

Searched refs:CPLD_LANE_G_SEL (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/board/freescale/p2041rdb/
H A D	p2041rdb.c	`72 #define CPLD_LANE_G_SEL 0x2 macro 97 mux \|= CPLD_LANE_G_SEL; in board_config_lanes_mux() 102 mux \|= CPLD_LANE_G_SEL \| CPLD_LANE_C_SEL \| CPLD_LANE_D_SEL; in board_config_lanes_mux() 105 mux \|= CPLD_LANE_G_SEL \| CPLD_LANE_A_SEL; in board_config_lanes_mux()`