Searched refs:CPG_SIPLL5_CLK3 (Results 1 – 2 of 2) sorted by relevance
14 #define CPG_SIPLL5_CLK3 (0x14C) macro
604 writel((params.pl5_fracin << 8), priv->base + CPG_SIPLL5_CLK3); in rzg2l_cpg_sipll5_set_rate()