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Searched refs:CPC_INT_CNTL__RESERVED_BIT_ERROR_INT_ENABLE__SHIFT (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h1502 #define CPC_INT_CNTL__RESERVED_BIT_ERROR_INT_ENABLE__SHIFT 0x1b macro
H A Dgfx_8_1_sh_mask.h2458 #define CPC_INT_CNTL__RESERVED_BIT_ERROR_INT_ENABLE__SHIFT 0x1b macro
H A Dgfx_8_0_sh_mask.h1936 #define CPC_INT_CNTL__RESERVED_BIT_ERROR_INT_ENABLE__SHIFT 0x1b macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h11878 #define CPC_INT_CNTL__RESERVED_BIT_ERROR_INT_ENABLE__SHIFT … macro
H A Dgc_9_1_sh_mask.h13308 #define CPC_INT_CNTL__RESERVED_BIT_ERROR_INT_ENABLE__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h13086 #define CPC_INT_CNTL__RESERVED_BIT_ERROR_INT_ENABLE__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h15089 #define CPC_INT_CNTL__RESERVED_BIT_ERROR_INT_ENABLE__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h3284 #define CPC_INT_CNTL__RESERVED_BIT_ERROR_INT_ENABLE__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h16319 #define CPC_INT_CNTL__RESERVED_BIT_ERROR_INT_ENABLE__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h18862 #define CPC_INT_CNTL__RESERVED_BIT_ERROR_INT_ENABLE__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h18562 #define CPC_INT_CNTL__RESERVED_BIT_ERROR_INT_ENABLE__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h17210 #define CPC_INT_CNTL__RESERVED_BIT_ERROR_INT_ENABLE__SHIFT … macro