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Searched refs:CP0TCSt_TCU3 (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/target/mips/sysemu/
H A Dcp0.c32 uint32_t mask = ((1 << CP0TCSt_TCU3) in sync_c0_status()
/openbmc/qemu/target/mips/
H A Dcpu.h477 #define CP0TCSt_TCU3 31 macro
H A Dcpu-defs.c.inc289 .CP0_TCStatus_rw_bitmask = (0 << CP0TCSt_TCU3) | (0 << CP0TCSt_TCU2) |