Searched refs:CP0St_SR (Results 1 – 3 of 3) sorted by relevance
77 mask &= ~(((1 << CP0St_SR) | (1 << CP0St_NMI)) & val); in cpu_mips_store_status()
776 #define CP0St_SR 20 macro
1106 env->CP0_Status |= (1 << CP0St_SR); in mips_cpu_do_interrupt()