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Searched refs:CP0SC_MASK (Results 1 – 1 of 1) sorted by relevance

/openbmc/qemu/target/mips/
H A Dcpu.h651 #define CP0SC_MASK (CP0SC_C_MASK | CP0SC_EU_MASK | CP0SC_AM_MASK | \ macro
655 #define CP0SC0_MASK (CP0SC_MASK | (CP0SC_MASK << 16))
658 #define CP0SC1_MASK (CP0SC_MASK | (CP0SC_MASK << 16) | CP0SC1_XAM_MASK)