Home
last modified time | relevance | path

Searched refs:CP0EnLo_XI (Results 1 – 4 of 4) sorted by relevance

/openbmc/qemu/target/mips/tcg/sysemu/
H A Dtlb_helper.c72 tlb->XI0 = (env->CP0_EntryLo0 >> CP0EnLo_XI) & 1; in r4k_fill_tlb()
78 tlb->XI1 = (env->CP0_EntryLo1 >> CP0EnLo_XI) & 1; in r4k_fill_tlb()
136 XI0 = (env->CP0_EntryLo0 >> CP0EnLo_XI) &1; in r4k_helper_tlbwi()
140 XI1 = (env->CP0_EntryLo1 >> CP0EnLo_XI) &1; in r4k_helper_tlbwi()
264 ((uint64_t)tlb->XI0 << CP0EnLo_XI) | (tlb->C0 << 3) | in r4k_helper_tlbr()
268 ((uint64_t)tlb->XI1 << CP0EnLo_XI) | (tlb->C1 << 3) | in r4k_helper_tlbr()
626 result |= rixi << CP0EnLo_XI; in get_tlb_entry_layout()
H A Dcp0_helper.c652 | (rxi << (CP0EnLo_XI - 30)); in helper_mtc0_entrylo0()
840 | (rxi << (CP0EnLo_XI - 30)); in helper_mtc0_entrylo1()
/openbmc/qemu/target/mips/
H A Dcpu.h609 # define CP0EnLo_XI 62 macro
612 # define CP0EnLo_XI 30 macro
/openbmc/qemu/target/mips/tcg/
H A Dtranslate.c5194 tcg_gen_shri_tl(arg, tmp, CP0EnLo_XI); in gen_mfc0()
5251 tcg_gen_shri_tl(arg, tmp, CP0EnLo_XI); in gen_mfc0()