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Searched refs:CP0C5_MVH (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/target/mips/
H A Dcpu-defs.c.inc444 .CP0_Config5 = MIPS_CONFIG5 | (1 << CP0C5_EVA) | (1 << CP0C5_MVH) |
528 .CP0_Config5 = MIPS_CONFIG5 | (1 << CP0C5_MVH) | (1 << CP0C5_LLB),
H A Dcpu.h949 #define CP0C5_MVH 5 macro
/openbmc/qemu/target/mips/tcg/
H A Dtranslate.c15081 ctx->mvh = (env->CP0_Config5 >> CP0C5_MVH) & 1; in mips_tr_init_disas_context()