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Searched refs:CP0C5_CV (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/target/mips/
H A Dcpu-defs.c.inc446 .CP0_Config5_rw_bitmask = (1 << CP0C5_K) | (1 << CP0C5_CV) |
912 .CP0_Config5_rw_bitmask = (1 << CP0C5_K) | (1 << CP0C5_CV) |
H A Dcpu.h930 #define CP0C5_CV 29 macro
/openbmc/qemu/target/mips/tcg/sysemu/
H A Dtlb_helper.c1315 env->CP0_Config5 & (1 << CP0C5_CV))) { in mips_cpu_do_interrupt()