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Searched refs:CP0C4_M (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/target/mips/
H A Dcpu-defs.c.inc49 ((0 << CP0C4_M))
383 .CP0_Config4 = MIPS_CONFIG4 | (1 << CP0C4_M),
408 .CP0_Config4 = MIPS_CONFIG4 | (1 << CP0C4_M),
441 .CP0_Config4 = MIPS_CONFIG4 | (1U << CP0C4_M) | (2 << CP0C4_IE) |
486 (3 << CP0C4_IE) | (1U << CP0C4_M),
527 (2 << CP0C4_IE) | (1U << CP0C4_M),
757 .CP0_Config4 = MIPS_CONFIG4 | (1U << CP0C4_M) | (3 << CP0C4_IE) |
797 .CP0_Config4 = MIPS_CONFIG4 | (1U << CP0C4_M) | (3 << CP0C4_IE) |
908 .CP0_Config4 = MIPS_CONFIG4 | (1U << CP0C4_M) | (2 << CP0C4_IE) |
1004 .CP0_Config4 = MIPS_CONFIG4 | (1U << CP0C4_M) |
H A Dcpu.h914 #define CP0C4_M 31 macro
H A Dkvm.c401 #define KVM_REG_MIPS_CP0_CONFIG4_MASK (1U << CP0C4_M)