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Searched refs:CP0C3_SP (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/target/mips/
H A Dcpu.h907 #define CP0C3_SP 4 macro
H A Dcpu-defs.c.inc45 (0 << CP0C3_VEIC) | (0 << CP0C3_VInt) | (0 << CP0C3_SP) | \