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Searched refs:CP0C3_DSP2P (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/target/mips/
H A Dcpu-defs.c.inc330 .CP0_Config3 = MIPS_CONFIG3 | (1 << CP0C3_DSP2P) | (1 << CP0C3_DSPP) |
356 .CP0_Config3 = MIPS_CONFIG3 | (1 << CP0C3_DSP2P) | (1 << CP0C3_DSPP) |
523 (1 << CP0C3_DSP2P) | (1 << CP0C3_DSPP) |
973 .CP0_Config3 = MIPS_CONFIG3 | (1U << CP0C3_M) | (1 << CP0C3_DSP2P) |
H A Dcpu.h900 #define CP0C3_DSP2P 11 macro