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Searched refs:CP0C3_BI (Results 1 – 4 of 4) sorted by relevance

/openbmc/qemu/target/mips/
H A Dcpu-defs.c.inc438 (1 << CP0C3_BP) | (1 << CP0C3_BI) | (1 << CP0C3_SC) |
482 (1 << CP0C3_BP) | (1 << CP0C3_BI) |
520 (1 << CP0C3_BI) | (1 << CP0C3_SC) | (3 << CP0C3_MMAR) |
755 (1 << CP0C3_BP) | (1 << CP0C3_BI) | (1 << CP0C3_ULRI) |
795 (1 << CP0C3_BP) | (1 << CP0C3_BI) | (1 << CP0C3_ULRI) |
906 (1 << CP0C3_BP) | (1 << CP0C3_BI) | (1 << CP0C3_ULRI) |
H A Dcpu.h889 #define CP0C3_BI 26 macro
/openbmc/qemu/target/mips/tcg/sysemu/
H A Dtlb_helper.c1001 if (env->CP0_Config3 & (1 << CP0C3_BI)) { in set_badinstr_registers()
1020 if (env->CP0_Config3 & (1 << CP0C3_BI)) { in set_badinstr_registers()
/openbmc/qemu/target/mips/tcg/
H A Dtranslate.c15078 ctx->bi = (env->CP0_Config3 >> CP0C3_BI) & 1; in mips_tr_init_disas_context()