Home
last modified time | relevance | path

Searched refs:CP0C1_IA (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/target/mips/
H A Dcpu-defs.c.inc63 (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) |
85 (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) |
105 (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) |
125 (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) |
145 (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) |
166 (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) |
187 (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) |
208 (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) |
230 (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) |
252 (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) |
[all …]
H A Dcpu.h862 #define CP0C1_IA 16 /* 18..16 */ macro