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Searched refs:CP0C0_K0 (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/target/mips/
H A Dcpu-defs.c.inc25 ((1U << CP0C0_M) | (0x2 << CP0C0_K0))
555 (2 << CP0C0_K0),
577 (2 << CP0C0_K0),
828 (1 << CP0C0_IB) | (1 << CP0C0_DB) | (0x2 << CP0C0_K0),
848 (1 << CP0C0_IB) | (1 << CP0C0_DB) | (0x2 << CP0C0_K0),
H A Dcpu.h847 #define CP0C0_K0 0 /* 2..0 */ macro