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Searched refs:CONFIG_SYS_FPGA_CSPR (Results 1 – 10 of 10) sorted by relevance

/openbmc/u-boot/include/configs/
H A Dls1043aqds.h228 #define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \ macro
277 #define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR
311 #define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR
344 #define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR
H A Dls1046aqds.h256 #define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \ macro
305 #define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR
339 #define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR
372 #define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR
H A Dls1088aqds.h195 #define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS_EARLY) \ macro
250 #define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR
269 #define CONFIG_SYS_CSPR2 CONFIG_SYS_FPGA_CSPR
306 #define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR
H A Dls1021aqds.h234 #define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \ macro
283 #define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR
316 #define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR
H A Dls1021atwr.h166 #define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(CPLD_BASE_PHYS) | \ macro
194 #define CONFIG_SYS_CSPR1 CONFIG_SYS_FPGA_CSPR
H A Dls1088ardb.h177 #define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS_EARLY) \ macro
210 #define CONFIG_SYS_CSPR2 CONFIG_SYS_FPGA_CSPR
/openbmc/u-boot/board/freescale/ls1046aqds/
H A Dls1046aqds.c80 CONFIG_SYS_FPGA_CSPR,
135 CONFIG_SYS_FPGA_CSPR,
/openbmc/u-boot/board/freescale/ls1043aqds/
H A Dls1043aqds.c94 CONFIG_SYS_FPGA_CSPR,
149 CONFIG_SYS_FPGA_CSPR,
/openbmc/u-boot/board/freescale/ls1088a/
H A Dls1088a.c81 CONFIG_SYS_FPGA_CSPR,
116 CONFIG_SYS_FPGA_CSPR,
/openbmc/u-boot/scripts/
H A Dconfig_whitelist.txt2628 CONFIG_SYS_FPGA_CSPR