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Searched refs:CONFIG_SYS_BCSR_BASE (Results 1 – 7 of 7) sorted by relevance

/openbmc/u-boot/board/freescale/mpc8569mds/
H A Dbcsr.c13 setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 17), BCSR17_FLASH_nWP); in enable_8569mds_flash_write()
18 clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 17), BCSR17_FLASH_nWP); in disable_8569mds_flash_write()
24 setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 7), in enable_8569mds_qe_uec()
26 setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 8), in enable_8569mds_qe_uec()
28 setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 9), in enable_8569mds_qe_uec()
30 setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 10), in enable_8569mds_qe_uec()
34 clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 7), in enable_8569mds_qe_uec()
36 clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 8), in enable_8569mds_qe_uec()
38 clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 9), in enable_8569mds_qe_uec()
40 clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 10), in enable_8569mds_qe_uec()
[all …]
H A Dmpc8569mds.c354 u8 *bcsr = (u8 *)CONFIG_SYS_BCSR_BASE; in fdt_board_fixup_qe_uart()
402 u8 *bcsr = (u8 *)CONFIG_SYS_BCSR_BASE; in board_mmc_init()
485 u8 *bcsr = (u8 *)CONFIG_SYS_BCSR_BASE; in fdt_board_fixup_qe_usb()
H A Dtlb.c52 SET_TLB_ENTRY(1, CONFIG_SYS_BCSR_BASE, CONFIG_SYS_BCSR_BASE_PHYS,
/openbmc/u-boot/board/freescale/mpc8568mds/
H A Dtlb.c78 SET_TLB_ENTRY(1, CONFIG_SYS_BCSR_BASE, CONFIG_SYS_BCSR_BASE,
/openbmc/u-boot/include/configs/
H A DMPC8569MDS.h126 #define CONFIG_SYS_BCSR_BASE 0xf8000000 macro
127 #define CONFIG_SYS_BCSR_BASE_PHYS CONFIG_SYS_BCSR_BASE
H A DMPC8568MDS.h102 #define CONFIG_SYS_BCSR_BASE 0xf8000000 macro
/openbmc/u-boot/scripts/
H A Dconfig_whitelist.txt2015 CONFIG_SYS_BCSR_BASE