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Searched refs:COMPUTE_DISPATCH_INITIATOR__ORDERED_APPEND_MODE_MASK (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h1860 #define COMPUTE_DISPATCH_INITIATOR__ORDERED_APPEND_MODE_MASK 0x00000010L macro
H A Dgfx_7_2_sh_mask.h7455 #define COMPUTE_DISPATCH_INITIATOR__ORDERED_APPEND_MODE_MASK 0x10 macro
H A Dgfx_8_1_sh_mask.h8797 #define COMPUTE_DISPATCH_INITIATOR__ORDERED_APPEND_MODE_MASK 0x10 macro
H A Dgfx_8_0_sh_mask.h8243 #define COMPUTE_DISPATCH_INITIATOR__ORDERED_APPEND_MODE_MASK 0x10 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h10206 #define COMPUTE_DISPATCH_INITIATOR__ORDERED_APPEND_MODE_MASK … macro
H A Dgc_9_1_sh_mask.h11691 #define COMPUTE_DISPATCH_INITIATOR__ORDERED_APPEND_MODE_MASK … macro
H A Dgc_9_2_1_sh_mask.h11488 #define COMPUTE_DISPATCH_INITIATOR__ORDERED_APPEND_MODE_MASK … macro
H A Dgc_9_4_3_sh_mask.h13208 #define COMPUTE_DISPATCH_INITIATOR__ORDERED_APPEND_MODE_MASK … macro
H A Dgc_9_4_2_sh_mask.h24183 #define COMPUTE_DISPATCH_INITIATOR__ORDERED_APPEND_MODE_MASK … macro
H A Dgc_11_0_0_sh_mask.h14589 #define COMPUTE_DISPATCH_INITIATOR__ORDERED_APPEND_MODE_MASK … macro
H A Dgc_10_1_0_sh_mask.h17075 #define COMPUTE_DISPATCH_INITIATOR__ORDERED_APPEND_MODE_MASK … macro
H A Dgc_11_0_3_sh_mask.h16737 #define COMPUTE_DISPATCH_INITIATOR__ORDERED_APPEND_MODE_MASK … macro
H A Dgc_10_3_0_sh_mask.h15387 #define COMPUTE_DISPATCH_INITIATOR__ORDERED_APPEND_MODE_MASK … macro