Searched refs:CNTP_CTL (Results 1 – 3 of 3) sorted by relevance
| /openbmc/qemu/tests/qtest/ |
| H A D | sse-timer-test.c | 46 #define CNTP_CTL 0x2c macro
73 writel(TIMER_BASE + CNTP_CTL, 0); in reset_counter_and_timer()
118 g_assert_cmpuint(readl(TIMER_BASE + CNTP_CTL), ==, 0); in test_timer()
123 writel(TIMER_BASE + CNTP_CTL, 1); in test_timer()
140 g_assert_cmpuint(readl(TIMER_BASE + CNTP_CTL), ==, 5); in test_timer()
149 g_assert_cmpuint(readl(TIMER_BASE + CNTP_CTL), ==, 1); in test_timer()
156 g_assert_cmpuint(readl(TIMER_BASE + CNTP_CTL), ==, 1); in test_timer()
158 g_assert_cmpuint(readl(TIMER_BASE + CNTP_CTL), ==, 5); in test_timer()
163 g_assert_cmpuint(readl(TIMER_BASE + CNTP_CTL), ==, 5); in test_timer()
166 g_assert_cmpuint(readl(TIMER_BASE + CNTP_CTL), ==, 1); in test_timer()
[all …]
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| /openbmc/qemu/hw/timer/ |
| H A D | sse-timer.c | 57 REG32(CNTP_CTL, 0x2c)
58 FIELD(CNTP_CTL, ENABLE, 0, 1)
59 FIELD(CNTP_CTL, IMASK, 1, 1)
60 FIELD(CNTP_CTL, ISTATUS, 2, 1)
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| /openbmc/linux/drivers/clocksource/ |
| H A D | arm_arch_timer.c | 52 #define CNTP_CTL 0x2c macro
133 writel_relaxed((u32)val, timer->base + CNTP_CTL); in arch_timer_reg_write()
173 val = readl_relaxed(timer->base + CNTP_CTL); in arch_timer_reg_read()
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