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Searched refs:CLOCK_BASE (Results 1 – 8 of 8) sorted by relevance

/openbmc/u-boot/arch/arm/mach-s5pc1xx/include/mach/
H A Dcpu.h92 SAMSUNG_BASE(clock, CLOCK_BASE)
/openbmc/linux/drivers/net/wan/
H A Dhd64572.c371 tmc = CLOCK_BASE / brv / port->settings.clock_rate; in sca_set_port()
382 port->settings.clock_rate = CLOCK_BASE / brv / tmc; in sca_set_port()
386 port->settings.clock_rate = CLOCK_BASE / (256 * 512); in sca_set_port()
H A Dpc300too.c48 static unsigned int CLOCK_BASE; variable
493 CLOCK_BASE = use_crystal_clock ? 24576000 : pci_clock_freq; in pc300_init_module()
H A Dhd64570.c415 tmc = CLOCK_BASE / brv / port->settings.clock_rate; in sca_set_port()
426 port->settings.clock_rate = CLOCK_BASE / brv / tmc; in sca_set_port()
430 port->settings.clock_rate = CLOCK_BASE / (256 * 512); in sca_set_port()
H A Dpci200syn.c43 #define CLOCK_BASE pci_clock_freq macro
H A Dc101.c48 #define CLOCK_BASE 9830400 /* 9.8304 MHz */ macro
H A Dn2.c43 #define CLOCK_BASE 9830400 /* 9.8304 MHz */ macro
/openbmc/u-boot/arch/arm/mach-exynos/include/mach/
H A Dcpu.h290 SAMSUNG_BASE(clock, CLOCK_BASE)