Home
last modified time | relevance | path

Searched refs:CLK_VPP1_SVPP2_MDP_RSZ (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt8195-vpp1.c70 GATE_VPP1_1(CLK_VPP1_SVPP2_MDP_RSZ, "vpp1_svpp2_mdp_rsz", "top_vpp", 4),
H A Dclk-mt8188-vpp1.c54 GATE_VPP1_0(CLK_VPP1_SVPP2_MDP_RSZ, "vpp1_svpp2_mdp_rsz", "top_vpp", 20),
/openbmc/linux/include/dt-bindings/clock/
H A Dmediatek,mt8188-clk.h460 #define CLK_VPP1_SVPP2_MDP_RSZ 20 macro
H A Dmt8195-clk.h580 #define CLK_VPP1_SVPP2_MDP_RSZ 36 macro