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Searched refs:CLK_TOP_VENC_LT_SEL (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dmt8173-clk.h115 #define CLK_TOP_VENC_LT_SEL 105 macro
/openbmc/linux/Documentation/devicetree/bindings/soc/mediatek/
H A Dscpsys.txt69 <&topckgen CLK_TOP_VENC_LT_SEL>;
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt8173-topckgen.c570 MUX_GATE(CLK_TOP_VENC_LT_SEL, "venclt_sel", venc_lt_parents,
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8173.dtsi486 <&topckgen CLK_TOP_VENC_LT_SEL>;
1402 <&topckgen CLK_TOP_VENC_LT_SEL>,
1412 assigned-clocks = <&topckgen CLK_TOP_VENC_LT_SEL>,
1515 clocks = <&topckgen CLK_TOP_VENC_LT_SEL>;
1517 assigned-clocks = <&topckgen CLK_TOP_VENC_LT_SEL>;