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Searched refs:CLK_TOP_SNPS_ETH_250M (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dmediatek,mt8188-clk.h76 #define CLK_TOP_SNPS_ETH_250M 65 macro
H A Dmt8195-clk.h94 #define CLK_TOP_SNPS_ETH_250M 82 macro
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt8188-topckgen.c1114 MUX_GATE_CLR_SET_UPD(CLK_TOP_SNPS_ETH_250M, "top_snps_eth_250m",
H A Dclk-mt8195-topckgen.c1066 MUX_GATE_CLR_SET_UPD(CLK_TOP_SNPS_ETH_250M, "top_snps_eth_250m",
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8195.dtsi1259 <&topckgen CLK_TOP_SNPS_ETH_250M>,
1263 assigned-clocks = <&topckgen CLK_TOP_SNPS_ETH_250M>,