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Searched refs:CLK_TOP_SENINF (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dmt8186-clk.h48 #define CLK_TOP_SENINF 29 macro
H A Dmt6779-clk.h38 #define CLK_TOP_SENINF 28 macro
H A Dmediatek,mt8188-clk.h59 #define CLK_TOP_SENINF 48 macro
H A Dmt8195-clk.h65 #define CLK_TOP_SENINF 53 macro
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt8186-topckgen.c582 MUX_GATE_CLR_SET_UPD(CLK_TOP_SENINF, "top_seninf",
H A Dclk-mt8188-topckgen.c1068 MUX_GATE_CLR_SET_UPD(CLK_TOP_SENINF, "top_seninf",
H A Dclk-mt8195-topckgen.c992 MUX_GATE_CLR_SET_UPD(CLK_TOP_SENINF, "top_seninf",
H A Dclk-mt6779.c732 MUX_GATE_CLR_SET_UPD(CLK_TOP_SENINF, "seninf_sel", seninf_parents,
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8186.dtsi925 clocks = <&topckgen CLK_TOP_SENINF>,
1007 clocks = <&topckgen CLK_TOP_SENINF>,
H A Dmt8195.dtsi815 clocks = <&topckgen CLK_TOP_SENINF>,